The present invention relates to integrated circuit devices and, more particularly, to ferroelectric integrated circuit devices, such as memory devices, including a ferroelectric capacitor and methods for manufacturing the same.
Recently, ferroelectric memory devices using ferroelectric layers have been considered as an alternative approach for certain memory applications. Ferroelectric memory devices are generally divided into two categories. The first category includes devices using a ferroelectric capacitor as described, for example, in U.S. Pat. No. 5,523,964. The second category includes devices having a ferroelectric field emission transistor (FET) as described, for example, in U.S. Pat. No. 5,198,994. Ferroelectric memory devices generally use polarization inversion and remnant polarization characteristics of an included ferroelectric layer to provide desired properties to the memory devices. These devices may provide higher-speed read and write operations and/or lower power consumption than other types of memory devices.
Because polarization inversion of a ferroelectric layer results from rotation of a dipole, ferroelectric memory devices may have an operation speed over 100 times faster than other nonvolatile memory devices, such as Electrical Erasable Programmable Read Only Memory (EEPROM) devices or flash memory devices. In addition, with optimized designs, ferroelectric memory devices may result in write operation speeds ranging from several hundreds of nanoseconds to several tens of nanoseconds. Such high speed operations may even be comparable to the operating speed of Dynamic Random Access Memory (DRAM) devices. With respect to possible power savings, EEPROM or flash memory devices typically require use of a high voltage of about 18 volts (V) through about 22 V for a write operation. Ferroelectric memory devices generally only need about 2 V through about 5 V for polarization inversion. Accordingly, they may be designed to operate with a single low-voltage power supply.
Performance of ferroelectric memory devices in the first category including a ferroelectric capacitor may be influenced by the characteristics of the ferroelectric capacitor. The characteristics of the ferroelectric capacitors may be significantly degraded, for example, during backend integration processes that are typically performed after the ferroelectric capacitor is formed. Examples of such backend integration processes include an InterLayer Dielectric (ILD) process, an InterMetal Dielectric (IMD) process, and a passivation process. These processes are generally performed by a chemical vapor deposition (CVD) method or a plasma enhanced CVD method. Such methods generally use hydrogen gas or silane (SiH4) gas containing hydrogen as a carrier gas. The carrier gas may act as a reducing gas, resulting in nonuniform charge distribution in the ferroelectric material of the capacitor. If the carrier gas is captured by the interface between top and bottom electrodes of the capacitor, the energy barrier between them may be lowered and the leakage current characteristic of the ferroelectric capacitor may be degraded. Furthermore, the carrier gas may react with oxygen within the ferroelectric material and oxygen vacancies may be induced within the ferroelectric layer. As a result, device performance after the backend integration process may be degraded.